The reliably of self-identifying chips have become a necessity in contemporary security and encryption applications. It is known in the art that there is a need for a secret key storage in the semiconductor industry, and further, wherein the cost is the top barrier that must be addressed to increase the adoption of the secret key storage and hardware intrinsic security. In addition, a unique identification of a specific device is a dominant reason given by survey participants for adopting secret key storage.
According, and particularly for fabless semiconductor design companies, there is a critical need in industry for a cost-effective solution to internal and external IC clients that provides chip authentication and identification with minimal design and area overhead. The solution requires a minimum amount of additional circuitry or mask levels on the chip, and sufficiently simple that they do not impact the yield, and it being adaptable to a broad range of products.
Process variations in a VLSI chip can originate unique electrical fingerprints, and these constitute a secure approach to chip security known as Physically Unclonable Functions (PUFs).
Several methodologies, mechanisms, and systems can be employed to allow intrinsic features of a computer chip or integrated circuit (IC) to be used to generate one or more unique and difficult to replicate IDs corresponding to the chip or IC. In one implementation for determining a unique intrinsic ID of a chip is described in U.S. Patent Application 2013/0133031 A1, titled “Retention Based Intrinsic Fingerprint Identification Featuring A Fuzzy Algorithm And A Dynamic Key” by Fainstein et al., published Can 23, 2013, of common assignee, is incorporated herein by reference in its entirety.
An additional implementation of determining a unique intrinsic ID of a chip is described in “Field Tolerant Dynamic Intrinsic Chip ID Using 32 nm High-K/Metal Gate SOI Embedded DRAM” by Rosenblatt et al., published in the IEEE Journal of Solid-State Circuits, Vol. 48, No. 4, April 2013, of common assignee, is incorporated herein by reference in its entirety.
A further implementation of determining a unique intrinsic ID of a chip is described in “Improved Circuits for Microchip Identification using SRAM Mismatch” by Chellappa, et al., Custom Integrated Circuits Conference (CICC), 2011 IEEE, of common assignee, is incorporated herein by reference in its entirety.
A further implementation of determining a unique intrinsic ID of a chip is described in “Physical Unclonable Functions for Device Authentication and Secret Key Generation” by Suh et al., Proceedings of the 44th Annual Design Automation Conference (ACM), 2007, of common assignee, is incorporated herein by reference in its entirety.
The challenges for a PUF based ID approaches reside in providing the intrinsic ID function to generate the PUF ID with minimum chip overhead while giving stable generation.